dual_boot

2014.10.06.19:25:34 Datasheet
Overview
  clk_0  dual_boot

All Components
   dual_boot_0 altera_dual_boot 14.0
Memory Map
  dual_boot_0
avalon 

clk_0

clock_source v14.0


Parameters

clockFrequency 50000000
clockFrequencyKnown true
inputClockFrequency 0
resetSynchronousEdges NONE
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

(none)

dual_boot_0

altera_dual_boot v14.0
clk_0 clk   dual_boot_0
  clk
clk_reset  
  nreset


Parameters

INTENDED_DEVICE_FAMILY MAX10FPGA
CLOCK_FREQUENCY 80.0
CONFIG_CYCLE 29
RESET_TIMER_CYCLE 41
AUTO_CLK_CLOCK_RATE 50000000
deviceFamily UNKNOWN
generateLegacySim false
  

Software Assignments

(none)
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